W78M64V-XSBX - Mx64 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip

White Electronic Designs

W78M64V-XSBX Datasheet Preview — Preview of W78M64V-XSBX PDF

Datasheet Details

Part number	W78M64V-XSBX
Manufacturer	White Electronic Designs
File Size	1.33 MB
Description	Mx64 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip
Datasheet	W78M64V-XSBX_WhiteElectronicDesigns.pdf

W78M64V-XSBX Product details

Description

DQ0-63 A0-22 WE#1-4 CS#1-4 OE# RESET# WP#/ACC RY/BY# VCC VIO GND DNU Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Hardware Reset Hardware Write Protection/Acceleration Ready/Busy Output Power Supply I/O Power Supply Ground Do Not Use GND DQ41 WE3# VIO DQ57 DNU WE4# VCC VIO VCC DQ33 DQ43 DQ45 DQ47 DQ49 DQ59 DQ61 DQ63 VCC VIO DQ40 DQ35 DQ37 DQ39 DQ56 DQ51 DQ53 DQ55 VIO VCC DQ32 DQ42 DQ44 DQ46 DQ48 DQ58 DQ60 DQ62 VCC GND CS3#

Features

Access Times of 70, 90, 100, 120ns Packaging.
159 PBGA, 13x22mm.
1.27mm pitch 1,000,000 Erase/Program Cycles per sector Page Mode.
Page size is 8 words: Fast page read access from random locations within the page. Sector Architecture.
Bank A (16Mb): 4Kw x 8 and 32 Kw x 31.
Bank B (48Mb): 32Kw x 96.
Bank C (48Mb): 32Kw x 96.
Bank D (16Mb): 4Kw x 8 and 3Kw x 31 Both top and bottom boot blocks Zero Power Operation Organized as 8Mx64, us.

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Published: Jun 9, 2010 |