C8051F130 Datasheet (Silicon Laboratories) - Mixed Signal ISP Flash MCU

C8051F130, Mixed Signal ISP Flash MCU

C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3 Mixed Signal ISP Flash MCU Family Analog Peripherals - 10 or 12-bit SAR ADC ± 1 LSB INL Programmable throughput up to 100 ksps Up to 8 external inputs; programmable as single- ended or differential Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5 Data-dependent windowed interrupt generator Built-in temperature sensor - 8-bit SAR ADC (‘F12x Only) Programmable throughput up to 500 ksps

C8051F130 Features

* 28 1.2. On-Chip Memory 29 1.3. JTAG Debug and Boundary Scan 30 1.4. 16 x 16 MAC (Multiply and Accumulate) Engine 31 1.5. Programmable Digital I/O and Crossbar 32 1.6. Programmable Counter Array 33 1.7. Serial Ports 33 1.8. 12 or 10-Bit Analog to Digital Converter 34 1.9. 8-Bit Analog to Digital