K7R321882M - 1Mx36 & 2Mx18 & 4Mx9 QDRTM II b2 SRAM

Samsung semiconductor

Datasheet Details

on page 2 and add HSTL I/O comment Draft Date June, 30 2001 Dec.

1.8V+0.1V/-0.1V Power Supply.
DLL circuitry for wide output data valid window and future freguency scaling.
I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/-0.1V for 1.8V I/O.
Separate independent read and write data ports with concurrent read and write operation.
HSTL I/O.
Full data coherency, providing most current data.
Synchronous pipeline read with self timed early write.
Registered address, control a.

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