Download the K4S281632B-TL10 datasheet PDF.
This datasheet also covers the K4S variant, as both devices belong to the same 128mbit sdram 2m x 16bit x 4 banks synchronous dram lvttl family and are provided as variant models within a single manufacturer datasheet.
Description
The K4S281632B is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology.
Features
- JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock. Burst read single-bit write operation DQM for masking Auto & self refresh 64ms refresh period (4K cycle)
CMOS SDRAM.