K4H561638F-UCC4, K4H560838F - 256Mb F-die DDR400 SDRAM

Samsung semiconductor

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K4H561638F-UCC4 Datasheet Preview — This datasheet PDF includes multiple part numbers: K4H561638F-UCC4, K4H560838F. Please refer to the document for exact specifications by model.

Datasheet Details

Part number	K4H561638F-UCC4, K4H560838F
Manufacturer	Samsung semiconductor
File Size	171.36 KB
Description	256Mb F-die DDR400 SDRAM
Datasheet	K4H560838F-UCCCSamsungsemiconductor.pdf
Note	This datasheet PDF includes multiple part numbers: K4H561638F-UCC4, K4H560838F. Please refer to the document for exact specifications by model.

K4H561638F-UCC4 Product details

Description

DDR SDRAM 16Mb x 16 32Mb x 8 VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 NC VDDQ LDQS NC VDD NC LDM WE CAS RAS CS NC BA0 BA1 AP/A10 A0 A1 A2 A3 VDD VDD DQ0 VDDQ NC DQ1 VSSQ NC DQ2 VDDQ NC DQ3 VSSQ NC NC VDDQ NC NC VDD NC NC WE CAS RAS CS NC BA0 BA1 AP/A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 66 65 64 63 62 61 60 59 58 VSS DQ7 VSSQ NC DQ6 VDDQ NC DQ5 VSSQ NC DQ4 VDDQ NC NC VSSQ DQS NC VREF VSS DM CK CK CKE NC A12 A

Features

200MHz Clock, 400Mbps data rate.
VDD= +2.6V + 0.10V, VDDQ= +2.6V + 0.10V.
Double-data-rate architecture; two data transfers per clock cycle.
Bidirectional data strobe(DQS).
Four banks operation.
Differential clock inputs(CK and CK).
DLL aligns DQ and DQS transition with CK transition.
MRS cycle with address key programs -. Read latency 3 (clock) for DDR400 , 2.5 (clock) for DDR333 -. Burst length (2, 4, 8) -. Burst type (s.

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Published: Oct 10, 2005 |