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KM732V688 - 64Kx32-Bit Synchronous Pipelined Burst SRAM

Description

The KM732V688/L is a 2,097,152 bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System.

Features

  • Synchronous Operation. 2 Stage Pipelined operation with 4 Burst. On-Chip Address Counter. Self-Timed Write Cycle. On-Chip Address and Control Registers. VDD=3.3V-5%/+10% Power Supply I/O Supply Voltage : 3.3V-5%/+10% 5V Tolerant Inputs except I/O Pins. Byte Writable Function. Global Write Enable Controls a full bus-wid.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PRELIMINARY KM732V688/L Document Title 64Kx32-Bit Synchronous Pipelined Burst SRAM, 3.3V Power Datasheets for 100QFP/TQFP 64Kx32 Synchronous SRAM Revision History Rev. No. Rev. 0.0 Rev. 1.0 Rev. 2.0 History Initial draft Final spec release Change tOE value form 6.0 to 5.0 at tCYC 13ns. Change tCD value from 8.0 to 7.0 , tOE value form 7.0 to 5.0 at tCYC 15ns. Draft Date Jan. 19.1996 May. 25. 1997 Jun. 25. 1998 Remark Preliminary Final Final The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device.
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