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9DBL0242C - 2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers

Description

2.

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Features

  • 2 to 8 Low-Power HCSL (LP-HCSL) outputs eliminate 4 resistors per output pair.
  • 9DBL0x4x devices provide integrated 100Ω terminations.
  • 9DBL0x5x devices provide integrated 85Ω terminations.
  • See AN-891 for easy coupling to other logic families.
  • Spread-spectrum compatible.
  • Dedicated OE# pin for each output.
  • 1MHz to 200MHz operation in fan-out mode.
  • 3 selectable SMBus addresses.
  • Extensive SMBus-selectable features allow optimization to customer requiremen.

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📁 Similar Datasheet

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Other Datasheets by Renesas
  • 9DBL0242 - Zero-Delay/Fanout Buffer
  • 9DBL0252 - Zero-Delay/Fanout Buffer
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  • 9DBL0255 - 2 and 4-Output 3.3V PCIe Gen1-5 Clock Fanout Buffers
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Full PDF Text Transcription

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9DBL02x2/9DBL04x2/9DBL06x1/9DBL08x1C 2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers Datasheet The 9DBL02x2/9DBL04x2/9DBL06x1/9DBL08x1C buffers are low-power, high-performance members of Renesas' full-featured PCIe family. The buffers support PCIe Gen1 through Gen6.
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