Description
The 8V79S683 is a fully integrated, clock and SYSREF signal fanout buffer for JESD204B/C applications.
Features
- Distribution, fanout, phase-delay of clock and SYSREF signals.
- Very low output noise floor: -158.8dBc/Hz noise floor
(245.76MHz).
- Supports clock frequencies up to 3GHz, including clock output
frequencies of 983.04MHz, 491.52MHz, 245.76MHz, and 122.88MHz.
- Four output channels with a total of 16 differential outputs.
- Each channel contains frequency dividers and clock phase delay circuits.
- Phase alignment mode across multiple buffers with any frequency divider setting.
8V79S683-Renesas.pdf
