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8S89832I 1-to-4 Differential-to-LVDS Fanout Buffer

8S89832I Description

Low Skew, 1-to-4 Differential-to-LVDS Fanout Buffer 8S89832I Data Sheet .
The 8S89832I is a high speed 1-to-4 Differential-to-LVDS Fanout Buffer.

8S89832I Features

* Four differential LVDS output pairs
* IN, nIN input pairs can accept the following differential input levels: LVPECL, LVDS, SSTL
* 50 internal input termination to VT
* Maximum output frequency: 2GHz
* Output skew: 25ps (maximum)
* Part-to-part skew

8S89832I Applications

* such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVPECL, LVDS, and SSTL to be easily interfaced to the input with minimal use of external components. The device also has

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Datasheet Details

Part number
8S89832I
Manufacturer
Renesas ↗
File Size
592.50 KB
Datasheet
8S89832I-Renesas.pdf
Description
1-to-4 Differential-to-LVDS Fanout Buffer

📁 Related Datasheet

  • 8S89831I - Differential LVPECL-To-LVPECL/ECL Fanout Buffer (IDT)
  • 8S89833 - 1-To-4 Differential-To-LVDS Fanout Buffer w/Internal Termination (IDT)
  • 8S89834I - 2-to-4 LVCMOS/LVTTL-toLVPECL/ECL Clock Multiplexer (IDT)

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1-to-4 Differential-to-LVDS Fanout Buffer Renesas
Renesas 8S89832I-like datasheet