MN89303A Datasheet (Panasonic) - SVGA Display Controller

MN89303A, SVGA Display Controller

Pin No.

3 Symbol AEN I/O I Level TTL Address Enable For Information Equipment Function Description "H" level input from this pin indicates that a DMA transfer is in progress, so the chip does not respond to I/O access.

4 5 6 7 SBHE IOWR IORD SMEMW I I I I TTL TTL TTL TTL Byte High Enable Thi

MN89303A Features

* all the necessary interfaces for a compact display system: ISA bus interface, local bus interface, DRAM interface, and LCD panel interface. The built-in graphics acceleration functions include support for hardware cursor. Note: IBM™ and VGA are registered trademarks of International Business Machine