MN89302 Datasheet (Panasonic) - SVGA Display Controller

MN89302, SVGA Display Controller

Pin No.

27 Symbol AEN I/O I Level TTL Address Enable For Information Equipment Function Description "H" level input from this pin indicates that a DMA transfer is in progress, so the chip does not respond to I/O access.

28 24 25 22 SBHE IOWR IORD SMEMW I I I I TTL TTL TTL TTL Byte High Enabl

MN89302 Features

* all the necessary interfaces for a compact display system: ISA bus interface, local bus interface, DRAM interface, and LCD panel interface. The built-in graphics acceleration functions include support for bit-block transfers (BITBLT) and hardware cursor. Note: IBM™ and VGA are registered trademarks