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MC100LVEL51 - Differential Clock D Flip-Flop

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ON Semiconductor

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MC100LVEL51 Differential Clock D Flip-Flop by ON Semiconductor - Datasheet Preview — Datasheet preview – MC100LVEL51

Datasheet Details

Part number	MC100LVEL51
Manufacturer	ON Semiconductor
File Size	244.74 KB
Description	Differential Clock D Flip-Flop
Datasheet	MC100LVEL51 Datasheet
Additional preview pages of the MC100LVEL51 datasheet.

Product details

Description

The MC100LVEL51 is a differential clock D flip-flop with reset.

Features

475 ps Propagation Delay.
2.8 GHz Toggle Frequency.
ESD Protection: > 4 kV Human Body Model, > 200 V Machine Model.
The 100 Series Contains Temperature Compensation.
PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V.
NECL Mode Operating Range: VCC = 0 V with VEE =.
3.0 V to.
3.8 V.
Internal Input Pulldown Resistors.
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test.
Moisture Sensit.

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Other Datasheets by ON Semiconductor

MC100LVEL58 - 2:1 Multiplexer
MC100LVEL59 - Triple 2:1 Multiplexer
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Published: Apr 26, 2005 |