Description
Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Name DL0/SDI DL1/SICK DL2/LEN DL3 DL4 VSS1 DL5 DL6 DL7 DL8 DL9 DL10 DO0 DO1 DO2 DO3 VSS2 DO4 DO5 DO6 DO7 I/O (1) Ip Ip Ip Ip Ip
Ip Ip Ip Ip Ip Ip O O O O
O O O O Function Delay length set parallel data bit DL0 (LSB) when PARA is HIGH, and SDI serial data input when PARA is LOW.
Features
- s s s s s
DL1/SICK DL2/LEN DL3 DL4 VSS1 DL5 DL6 DL7 DL8 DL9
SM5 8 3 7 A F
s s s s s
Variable-length 1H delay 12-bit input/output signal width 31 to 2078- bit delay length range 40 MHz maximum operating frequency Selectable delay setting method.
- 11-bit parallel input.
- 3-line serial input TTL-compatible input/outputs Tristate outputs 4.75 to 5.25 V operating voltage 44-pin QFP Molybenum-gate CMOS process
VSS2.
SM5837AF_NipponPrecisionCircuitsInc.pdf
