DS90C124 Datasheet (National Semiconductor) - 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

DS90C124, 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

The DS90C241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information.

This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by eliminating the skew problems between parallel data and cloc

DS90C124 Features

* pre-emphasis to boost signals over longer distances using lossy cables. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects. n User selectable clock edge for parallel data on both Transmitter and Receiver n Internal DC Balancing encode/decode

* Supports AC-coup