Datasheet Details
| Part number | DM74LS502 |
|---|---|
| Manufacturer | National Semiconductor |
| File Size | 124.27 KB |
| Description | 8-Bit Successive Approximation Register |
| Datasheet |
 DM74LS502 Datasheet
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| Part number | DM74LS502 |
|---|---|
| Manufacturer | National Semiconductor |
| File Size | 124.27 KB |
| Description | 8-Bit Successive Approximation Register |
| Datasheet |
DM74LS502 Datasheet
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The LS502 is an 8-bit register with the interstage logic necessary to perform serial-to-parallel conversion and provide an active LOW Conversion Complete (CC) signal coincident with storage of the eighth bit An active LOW Start (S) input performs synchronous initialization which forces Q7 LOW and all other outputs HIGH Subsequent clocks shift this Q7 LOW signal downstream which simultaneously backfills the register such that the first serial data (D input) bit is stored in Q7 the second bit in Q
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