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HEF4526B Programmable 4-bit binary down counter

HEF4526B Description

HEF4526B Programmable 4-bit binary down counter Rev.5 * 22 November 2011 Product data sheet 1.General .
The HEF4526B is a synchronous programmable 4-bit binary down counter with active HIGH and active LOW clock inputs (CP0, CP1), an asynchronous paralle.

HEF4526B Features

* Fully static operation
* 5 V, 10 V, and 15 V parametric ratings
* Standardized symmetrical output characteristics
* Specified from 40 C to +85 C
* Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from 40 C to

HEF4526B Applications

* In single stage applications the TC output is connected to PL. CF allows cascade divide-by-n operation with no additional gates required. Information on A0 to A3 is loaded into the counter while PL is HIGH, independent of all other inputs except MR, which must be LOW. When PL and CP1 are LOW, the c

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Programmable 4-bit binary down counter NXP
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