MTD5N25E Datasheet (Motorola)

MTD5N25E, TMOS POWER FET

www.DataSheet4U.com MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTD5N25E/D Designer's TMOS E-FET .™ Power Field Effect Transistor DPAK for Surface Mount N Channel Enhancement Mode Silicon Gate This advanced TMOS E FET is designed to withstand high energy in the avalanche and commutation modes.

The new energy efficient design also offers a drain to source diode with a fast recovery time.

Designed for low voltage, high speed switching a

MTD5N25E Features

* bed inductive load. Power MOSFETs may be safely operated into an inductive load; however, snubbing reduces switching losses. 1000 800 C, CAPACITANCE (pF) Ciss VDS = 0 V VGS = 0 V TJ = 25°C 600 Ciss 400 Crss 200 0 Crss 10 5 VGS 0 VDS 5 10 15 Coss 20 25 GATE

* TO

* SOURCE OR DRAI