MPC93R51 Datasheet (Motorola) - LOW VOLTAGE PLL CLOCK DRIVER

MPC93R51, LOW VOLTAGE PLL CLOCK DRIVER

The MPC93R51 utilizes PLL technology to frequency and phase lock its outputs onto an input reference clock.

Normal operation of the MPC93R51 requires a connection of one of the device outputs to the EXT_FB input to close the PLL feedback path.

The reference clock frequency and the output divider for

MOTOROLA Freescale Semiconductor, Inc.

SEMICONDUCTOR TECHNICAL DATA Order Number: MPC93R51/D Rev 0, 12/2002 Low Voltage PLL Clock Driver The MPC93R51 is a 3.3V compatible, PLL based clock generator targeted for high performance clock distribution systems.

With output frequencies of up to 240 MHz and a maximum output skew of 150 ps the MPC93R51 is an ideal solution for the most demanding clock tree designs.

The device offers 9 low skew clock outputs, each is configurable to support the clocki

MPC93R51 Features

* W Application Information The fully integrated PLL of the MPC93R51 allows the low skew outputs to lock onto a clock input and distribute it with essentially zero propagation delay to multiple components on the board. In zero-delay buffer mode, the PLL minimizes phase offset between the outputs and