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M5M5V32R16J-12 - 524288-BIT (32768-WORD BY 16-BIT) CMOS STATIC RAM

Description

The M5M5V32R16 is a family of 32768-word by 16-bit static RAMs, fabricated with the high performance CMOS process and designed for high speed application.

These devices operate on a single 3.3V supply, and are directly TTL compatible.

They include a power down feature as well.

Features

  • Fast access time M5M5V32R16J,TP-10 10ns(max) M5M5V32R16J,TP-12 12ns(max) M5M5V32R16J,TP-15 15ns(max) Low power dissipation Active 297mW(typ) Stand by 0.33mW(typ) Single +3.3V power supply Fully static operation : No clocks, No refresh Common data I/O Easy memory expansion by /S Three-state outputs : OR-tie capability OE prevents data contention in the I/O bus Directly TTL compatible : All inputs and outputs Separate control of lower and upper bytes by /LB and /UB A4.

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M5M5V32R16J-10 524288-BIT (32768-WORD BY 16-BIT) CMOS STATIC RAM
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MITSUBISHI LSIs 1997.01.22 PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change. M5M5V32R16J,TP-10,-12,-15 524288-BIT (32768-WORD BY 16-BIT) CMOS STATIC RAM DESCRIPTION The M5M5V32R16 is a family of 32768-word by 16-bit static RAMs, fabricated with the high performance CMOS process and designed for high speed application. These devices operate on a single 3.3V supply, and are directly TTL compatible. They include a power down feature as well. In write and read cycles, the lower and upper bytes are able to be controled either togethe or separately by /LB and /UB. PIN CONFIGURATION (TOP VIEW) N.C A3 A2 ADDRESS INPUTS A1 A0 CHIP SELECT /S INPUTS DQ1 DATA DQ2 INPUTS/ OUTPUTS DQ3 DQ4 (3.
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