M2S56D20ATP-75AL, M2S 256M Double Data Rate Synchronous DRAM

Mitsubishi

Description

DDR SDRAM (Rev.1.44) Mar.'02 MITSUBISHI LSIs M2S56D20/ 30/ 40ATP -75AL, -75A, -75L, -75, -10L, -10 M2S56D20/ 30/ 40AKT -75AL, -75A, -75L, -75, -10L.
M2S56D20ATP / AKT is a 4-bank x 16777216-word x 4-bit, M2S56D30ATP / AKT is a 4-bank x 8388608-word x 8-bit, M2S56D40ATP/ AKT is a 4-bank x 4194304-wo.

📥 Download Datasheet

M2S56D20ATP-75AL Datasheet Preview — This datasheet PDF includes multiple part numbers: M2S56D20ATP-75AL, M2S. Please refer to the document for exact specifications by model.

Datasheet Specifications

Part number: M2S56D20ATP-75AL, M2S
Manufacturer: Mitsubishi
File Size: 768.53 KB
Datasheet: M2S-56D.pdf
Description: 256M Double Data Rate Synchronous DRAM
Note: This datasheet PDF includes multiple part numbers: M2S56D20ATP-75AL, M2S.
Please refer to the document for exact specifications by model.

Features

* - VDD=VDDQ=2.5V+0.2V - Double data rate architecture; two data transfers per clock cycle - Bidirectional, data strobe (DQS) is transmitted/received with data - Differential clock inputs (CLK and /CLK) - DLL aligns DQ and DQS transitions - Commands are entered on each positive CLK edge - Data and dat

M2S56D20ATP-75AL Distributors

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M2S 256M Double Data Rate Synchronous DRAM Mitsubishi

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