MAX9160 - LVDS or LVTTL/LVCMOS Input to 14 LVTTL/LVCMOS Output Clock Driver

Product Overview

Maxim

Part number	MAX9160
Manufacturer	Maxim
File Size	348.22 KB
Description	LVDS or LVTTL/LVCMOS Input to 14 LVTTL/LVCMOS Output Clock Driver
Datasheet	MAX9160 Datasheet
Additional preview pages of the MAX9160 datasheet.

The MAX9160 125MHz, 14-port LVTTL/LVCMOS clock driver repeats the selected LVDS or LVTTL/LVCMOS input on two output banks.

o LVDS or LVTTL/LVCMOS Input Selection o LVDS Input Fail-Safe Sets Outputs High for Open, Undriven Short, or Undriven Parallel Termination o Two Output Banks with Separate Bank Enables o Integrated Output Series Termination for 60Ω Lines o 200ps (max) Output-to-Output Skew o ±100ps (max) Peak-to-Peak Added Output Jitter o 42% to 58% Output Duty Cycle at 125MHz o Guaranteed 125MHz Operating Frequency o LVDS Input Is High Impedance with VCC = 0V or Open (Hot Swappable) o 28-Pin Exposed- and Nonexp.

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Published: May 2, 2005 |