ispClock5410D Datasheet (Lattice Semiconductor) - Zero Delay And Fan-Out Buffer

ispClock5410D, Zero Delay And Fan-Out Buffer

The ispClock5400D family integrates a CleanClock PLL and a FlexiClock Output block.

The CleanClock PLL provides an ultra-low-jitter clock source to a set of four V-dividers.

The FlexiClock output block receives the clock output from these V-dividers through an output switch matrix and distributes th

ispClock5410D Features

* CleanClock™ PLL

* Ultra Low Period Jitter 2.5ps

* Ultra Low Phase Jitter 6.5ps

* Fully Integrated High-Performance PLL

* Programmable lock detect Four output dividers Programmable on-chip loop filter Compatible with Spread Spectrum clocks I