ISPGAL22V10 Datasheet (Lattice Semiconductor) - In-System Programmable E2CMOS PLD

ISPGAL22V10, In-System Programmable E2CMOS PLD

PIN CONFIGURATION The ispGAL22V10, at 7.5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the industry's first in-system programmable 22V10 device.

E2 technology offers high speed (<100ms) erase times, pro

ISPGAL22V10 Features

* IN-SYSTEM PROGRAMMABLE™ (5-V ONLY)

* 4-Wire Serial Programming Interface

* Minimum 10,000 Program/Erase Cycles

* Built-in Pull-Down on SDI Pin Eliminates Discrete Resistor on Board (ispGAL22V10C Only)

* HIGH PERFORMANCE E2CMOS® TECHNOLOGY

* 7.5 ns Ma