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82C55 CHMOS PROGRAMMABLE PERIPHERAL INTERFACE

82C55 Description

82C55A CHMOS PROGRAMMABLE PERIPHERAL INTERFACE Y Compatible with all Intel and Most Other Microprocessors High Speed ‘‘Zero Wait State’’ Operation wi.
Symbol PA3. 0 RD CS Pin Number Dip PLCC 1. 4 5 6 2. 5 6 7 Type I O I I Name and Function PORT A PINS 0. 3 Lower nibble.

82C55 Features

* or ‘‘personality’’ to further enhance the power and flexibility of the 82C55A Port A One 8-bit data output latch buffer and one 8-bit input latch buffer Both ‘‘pull-up’’ and ‘‘pulldown’’ bus hold devices are present on Port A Port B One 8-bit data input output latch buffer Only ‘‘pull-up’’ bus hold

82C55 Applications

* 231256
* 5 Figure 5 Basic Mode Definitions and Bus Interface When Port C is being used as status control for Port A or B these bits can be set or reset by using the Bit Set Reset operation just as if they were data output ports 5 82C55A Interrupt Control Functions When the 82C55A is progr

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Datasheet Details

Part number
82C55
Manufacturer
Intel Corporation
File Size
325.10 KB
Datasheet
82C55_IntelCorporation.pdf
Description
CHMOS PROGRAMMABLE PERIPHERAL INTERFACE

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CHMOS PROGRAMMABLE PERIPHERAL INTERFACE Intel Corporation
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