IS61DDB44M18 - DDR-II (Burst of 4) CIO Synchronous SRAMs

Integrated Silicon Solution

Datasheet Details

Part number	IS61DDB44M18
Manufacturer	Integrated Silicon Solution
File Size	601.56 KB
Description	DDR-II (Burst of 4) CIO Synchronous SRAMs
Datasheet	IS61DDB44M18-IntegratedSiliconSolution.pdf

The 72Mb IS61DDB42M36 and IS61DDB44M18 are synchronous, high-performance CMOS static random access memory (SRAM) devices.

2M x 36 or 4M x 18.
On-chip delay-locked loop (DLL) for wide data valid window.
Common I/O read and write ports.
Synchronous pipeline read with late write operation.
Double data rate (DDR-II) interface for read and write input ports.
Fixed 4-bit burst for read and write operations.
Clock stop support.
Two input clocks (K and K) for address and control registering at rising edges only.
Two input clocks (C an.

📁 IS61DDB44M18 Similar Datasheet

Other Datasheets by Integrated Silicon Solution

Published: Jul 25, 2016 |