IS61DDB24M18C - 72Mb DDR-II CIO SYNCHRONOUS SRAM

Datasheet Details

Part number	IS61DDB24M18C
Manufacturer	ISSI
File Size	762.12 KB
Description	72Mb DDR-II CIO SYNCHRONOUS SRAM
Datasheet	IS61DDB24M18C-ISSI.pdf

The 72Mb IS61DDB22M36C and IS61DDB24M18C are synchronous, high-performance CMOS static random access memory (SRAM) devices.

2Mx36 and 4Mx18 configuration available.
Common I/O read and write ports.
Max. 400 MHz clock for high bandwidth.
Synchronous pipeline read with self-timed late write operation.
Double Data Rate (DDR) interface for read and write input ports.
Fixed 2-bit burst for read and write operations.
Clock stop support.
Two input clocks (K and K#) for address and control registering at rising edges only.
Two input clocks (C and C#) for data output contro.

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Published: Feb 18, 2024 |