ICS873991-147 LOW VOLTAGE LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR

Integrated Device Technology

Description

www.DataSheet4U.com PRELIMINARY LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR ICS873991-147 GENERAL .
The ICS873991-147 is a low voltage, low skew, 3.

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Datasheet Specifications

Part number: ICS873991-147
Manufacturer: Integrated Device Technology
File Size: 337.98 KB
Datasheet: ICS873991-147_IntegratedDeviceTechnology.pdf
Description: LOW VOLTAGE LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR

Features

* Fourteen differential 3.3V LVPECL/ECL outputs
* Selectable differential LVPECL or REF_CLK inputs
* PCLK, nPCLK can accept the following input levels: LVPECL, CML, SSTL
* REF_CLK accepts the following input levels: LVCMOS, LVTTL
* Input clock frequency range:

Applications

* where Bank A and Bank C are running at different frequencies, and is particularly useful when they are running at non-integer multiples of each other. Example Applications: 1. Line Card Multiplier: Multiply 19.44MHz from a back-plane to 77.76MHz on the line card ASIC and Serdes. 2. Zero Delay Buffer

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ICS873991-147 LOW VOLTAGE LVCMOS LVPECL-TO LVPECL ECL CLOCK GENERATOR Integrated Device Technology

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