ICS9112-16 Datasheet (Integrated Circuit Systems)

ICS9112-16, Low Skew Output Buffer

General a The ICS9112-16 is a high performance, low skew, low jitter .D It uses clock driver.

a phase lock loop (PLL) technology w to align, in both phase and frequency, the REF input with the signal.

It is designed to distribute high speed w CLKOUT clocks in PC w133 MHz.

systems operating at speeds

ICS9112-16 Features

* Zero input - output delay Frequency range 25 - 133 MHz (3.3V) High loop filter bandwidth ideal for Spread Spectrum applications. Less than 200 ps Jitter between outputs Skew controlled outputs Skew less than 250 ps betwe