M2006-12 - VCSO BASED FEC CLOCK PLL / HITLESS SWITCHING OPTION

Name: M2006-12
SKU: M2006-12-208290

Integrated Circuit Solution Inc

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Datasheet Details

Part number	M2006-12
Manufacturer	Integrated Circuit Solution Inc
File Size	83.76 KB
Description	VCSO BASED FEC CLOCK PLL / HITLESS SWITCHING OPTION
Datasheet	M2006-12_IntegratedCircuitSolutionInc.pdf

M2006-12 Product details

Description

The M2006-02 and -12 are VCSO (Voltage Controlled SAW Oscillator) based clock generator PLLs designed for clock frequency translation and jitter attenuation.

Features

Pin-selectable PLL divider ratios support forward and inverse FEC ratio translation, including:.
255/238 (OTU1) Mapping and 238/255 De-mapping.
255/237 (OTU2) Mapping and 237/255 De-mapping.
255/236 (OTU3) Mapping and 236/255 De-mapping Example I/O Clock Frequency Combinations Using M2006-02/-12-622.0800 and Inverse FEC Ratios FEC PLL Ratio Mfec / Rfec 1/1 238/255 237/255 236/255 Base Input Rate 1 (MHz) 622.0800 666.5143 669.3266 672.1627 Output Clock (eithe.

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Published: Mar 30, 2005 |