S26HS02GT Datasheet (Infineon)

S26HS02GT, 2Gb Flash

2 Interface overview

S26HS02GT, S26HS04GT, S26HL02GT, S26HL04GT 2Gb/4Gb SEMPER™ Flash HYPERBUS™ interface, 1.8V/3.0V Device overview Architecture - Infineon® 45-nm MIRRORBIT™ technology that stores two data bits in each memory array cell - Multi-chip package (MCP) 02GT Dual die package (DDP) 2  1 Gb die 04GT Quad die package (QDP) 4  1 Gb die - Sector architecture options Uniform: Address space consists of all 256 KB sectors Hybrid Configuration 1: Address space co

S26HS02GT Features

* Functional safety with the industry’s first ISO26262 ASIL B compliant and ASIL D ready NOR Flash

* Infineon Endurance flex architecture provides high-endurance and long retention partitions

* Interface CRC detects errors on communication interface between host controller an