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JESD204B Compliant Fanout Buffer and Divider
8V79S680
Datasheet
Description
The 8V79S680 is a fully integrated, clock and SYSREF signal fanout buffer for JESD204B applications. It is designed as a high-performance clock and converter synchronization solution for wireless base station radio equipment boards with JESD204B subclass 0, 1 and 2 compliance. The main function of the device is the distribution and fanout of high-frequency clocks and low-frequency system reference signals generated by a JESB204B clock generator such as the IDT 8V19N480, extending its fanout capabilities and providing additional phase-delay.
8V79S680 Datasheet
