HMP125F7EFR8C-S5, HMP112F7EFR8C-Y5N3 - 240pin Fully Buffered DDR2 SDRAM DIMMs

Hynix

Datasheet Details

Part number	HMP125F7EFR8C-S5, HMP112F7EFR8C-Y5N3
Manufacturer	Hynix
File Size	1.08 MB
Description	240pin Fully Buffered DDR2 SDRAM DIMMs
Datasheet	HMP112F7EFR8C-Y5N3_Hynix.pdf
Note	This datasheet PDF includes multiple part numbers: HMP125F7EFR8C-S5, HMP112F7EFR8C-Y5N3. Please refer to the document for exact specifications by model.

and is subject to change without notice.

novel architecture including the Advanced Memory Buffer that isolates the DDR2 SDRAMs from the channel. This single component located in the front side center of each DIMM, acts as a repeater and buffer for all signals and commands which are exchanged between the host controller and the DDR2 SDRAMs including data in and output. The AMB communicates with the host controller and adjacent DIMMs on a system board using an industry standard Differential Point to Point Link Interface at 1.5V power. Th.

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Published: Dec 12, 2013 |