Datasheet Specifications
- Part number
- HY5S7B2ALFP-6
- Manufacturer
- Hynix Semiconductor
- File Size
- 1.84 MB
- Datasheet
- HY5S7B2ALFP-6_HynixSemiconductor.pdf
- Description
- 512M (16Mx32bit) Mobile SDRAM
Description
512MBit MOBILE SDR SDRAMs based on 4M x 4Bank x32 I/O Specification of 512M (16Mx32bit) Mobile SDRAM Memory Cell Array - Organized as 4banks of 4,19.
Features
* Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK) MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - During bApplications
* which requires large memory density and high bandwidth. It is organized as 4banks of 4,194,304x32. Mobile SDRAM is a type of DRAM which operates in synchronization with input clock. The Hynix Mobile SDRAM latch each control signal at the rising edge of a basic input clock (CLK) and input/output dataHY5S7B2ALFP-6 Distributors
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