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HY5DU56822T - (HY5DU56xxx(L)T) 2nd 256M DDR SDRAM

Hynix Semiconductor

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Datasheet Details

Part number	HY5DU56822T
Manufacturer	Hynix Semiconductor
File Size	370.15 KB
Description	(HY5DU56xxx(L)T) 2nd 256M DDR SDRAM
Datasheet	HY5DU56822T_HynixSemiconductor.pdf

HY5DU56822T Product details

Description

and is subject to change without notice.

Features

VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS) x16 device has two bytewide data strobes (UDQS, LDQS) per each x8 I/O Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ) On chip DLL ali.

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Other Datasheets by Hynix Semiconductor

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Published: Jan 8, 2006 |