HY5DU56822CT, HY5DU56422CT - (HY5DU56xx22CT) 256M-P DDR SDRAM

Hynix Semiconductor

Datasheet Details

Part number	HY5DU56822CT, HY5DU56422CT
Manufacturer	Hynix Semiconductor
File Size	267.11 KB
Description	(HY5DU56xx22CT) 256M-P DDR SDRAM
Datasheet	HY5DU56422CT_HynixSemiconductor.pdf
Note	This datasheet PDF includes multiple part numbers: HY5DU56822CT, HY5DU56422CT. Please refer to the document for exact specifications by model.

and is subject to change without notice.

VDD/VDDQ = 2.5 ~ 2.7V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS) x16 device has two bytewide data strobes (UDQS, LDQS) per each x8 I/O Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ) On chip DLL align D.

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Published: Mar 21, 2007 |