Description
www.DataSheet4U.com 256Mb DDR SDRAM HY5DU56822E(L)FP HY5DU561622E(L)FP This document is a general product .
and is subject to change without notice.
Features
* VDD, VDDQ = 2.5V ± 0.2V for DDR200, 266, 333 VDD, VDDQ = 2.6V +0.1V / -0.2V for DDR400 All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Sour
Applications
* which requires large memory density and high bandwidth. This Hynix 256Mb DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data str
