HY5DU28422T - 2nd 128M DDR SDRAM

Hynix Semiconductor

Datasheet Details

Part number	HY5DU28422T
Manufacturer	Hynix Semiconductor
File Size	1.54 MB
Description	2nd 128M DDR SDRAM
Datasheet	HY5DU28422T-HynixSemiconductor.pdf

and is subject to change without notice.

VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS) x16 device has two bytewide data strobes (UDQS, LDQS) per each x8 I/O Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ) On chip DLL ali.

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Published: Aug 4, 2014 |