HC2510 Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications

Hynix Semiconductor

Description

HC2510C HC2510C .
The HC2510C is a low-skew, low jitter, phaselocked loop(PLL) clock driver, distributing high frequency clock signals for SDRAM.

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Datasheet Specifications

Part number: HC2510
Manufacturer: Hynix Semiconductor
File Size: 81.20 KB
Datasheet: HC2510_HynixSemiconductor.pdf
Description: Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications

Applications

* Supports PC-100 and Meets “PC100 SDRAM registered DIMM Specification Rev. 1.2” Distributes One Clock Input to One Bank of Ten Outputs No External RC Network Required External Feedback (FBIN) Pin is Used to Synchronize the Outputs to the Clock Input Separate Output Enable for Each Output Bank Operate

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📁 Related Datasheet

HC2500 HC2500A03 HC2500E03 HC2500P03 HC2500S03 HC2500U03-050

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HC2510 Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications Hynix Semiconductor

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