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H57V1262GTR 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O

H57V1262GTR Description

www.DataSheet4U.com 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O Document Title 4Bank x 2M x 16bits Synchronous DRAM Revision History Revision.
and is subject to change without notice.

H57V1262GTR Features

* Voltage: VDD, VDDQ 3.3V supply voltage All device pins are compatible with LVTTL interface 54 Pin TSOPII (Lead Free Package) All inputs and outputs referenced to positive edge of system clock Data mask function by UDQM, LDQM

H57V1262GTR Applications

* which require wide data I/O and high bandwidth. H57V1262GTR series is organized as 4banks of 2,097,152 x 16. H57V1262GTR is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths

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Datasheet Details

Part number
H57V1262GTR
Manufacturer
Hynix Semiconductor
File Size
235.78 KB
Datasheet
H57V1262GTR_HynixSemiconductor.pdf
Description
128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O

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128Mb Synchronous DRAM based 4Bank x16 Hynix Semiconductor
Hynix Semiconductor H57V1262GTR-like datasheet