Description
of Changes
Added a footnote to RTI of Table 3.2; Added RTI description to Section 3.5.6; Added a sentence "If active BDM mode is enabled in stop3, the internal RTI clock is not available." to the Section 5.7 Real Time Interrupt.Changed the Maximun Low Power of FBE and FEE in Table A-9 to 10 MHz.Changed the Title of Table 13-2 from “IIC1A Register Field Descriptions” to “IIC1F Register Field Descriptions” Added 42-pin SDIP information.Changed “However, when HGO=0, the maximum frequency is 8 M
Features
- 17 1.2.1 Standard Features of the HCS08 Family 17 1.2.2 Features of MC9S08GBxxA/GTxxA Series of MCUs 18 1.2.3 Devices in the MC9S08GBxxA/GTxxA Series 19 MCU Block Diagrams 19 System Clock Distribution 21
1.3 1.4
Chapter 2 Pins and Connections
2.1 2.2 2.3 Introduction 23 Device Pin Assignment 24 Recommended System Connections 27 2.3.1 Power 29 2.3.2 Oscillator 29 2.3.3 Reset 29 2.3.4 Background / Mode Select (PTG0/BKGD/MS) 30 2.3.5 General-Purpose I/O and Peripheral Ports 30 2.3.6 Signal Proper.