MC9S08DE60
Features
8-Bit HCS08 Central Processor Unit (CPU)
- 40-MHz HCS08 CPU (20-MHz bus)
- HC08 instruction set with added BGND instruction
- Support for up to 32 interrupt/reset sources
Peripherals
- ADC
- 24-channel, 12-bit resolution, 2.5 μs conversion time, automatic pare function, temperature sensor, internal bandgap reference channel
- ACMPx
- Two analog parators with selectable interrupt on rising, falling, or either edge of parator output; pare option to fixed internal bandgap reference voltage
- MSCAN
- CAN protocol
- Version 2.0 A, B; standard and extended data frames; support for remote frames; five receive buffers with FIFO storage scheme; flexible identifier acceptance filters programmable as: 2 x 32-bit, 4 x 16-bit, or 8 x 8-bit
- SCIx
- Two SCIs supporting LIN 2.0 Protocol and SAE J2602 protocols; full duplex non-return to zero (NRZ); master extended break generation; slave extended break detection; wakeup on active edge
- SPI
- Full-duplex or single-wire bidirectional;...
