GTLP6C817 Datasheet - Fairchild Semiconductor

GTLP6C817 Low Drive GTLP-to-LVTTL 1:6 Clock Driver

The GTLP6C817 is a low drive clock driver that provides TTL to GTLP signal level translation (and vice versa). The device provides a high speed interface between cards operating at TTL logic levels and a backplane operating at GTLP logic levels. High speed backplane operation is a direct result of G.

GTLP6C817 Features

* s Interface between TTL and GTLP logic levels s Edge Rate Control to minimize noise on the GTLP port s Power up/down high impedance for live insertion s 1:6 fanout clock driver for LVTTL port s 1:2 fanout clock driver for GTLP port s LVTTL compatible driver and control inputs s 5V over voltage toler

GTLP6C817 Datasheet (50.81 KB)