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74LS75 - Quad Latch

Description

These latches are ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DM74LS75 Quad Latch August 1986 Revised March 2000 DM74LS75 Quad Latch General Description These latches are ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable is HIGH, and the Q output will follow the data input as long as the enable remains HIGH. When the enable goes LOW, the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the enable is permitted to go HIGH. These latches feature complementary Q and Q outputs from a 4-bit latch, and are available in 16-pin packages.