EM63A325 Datasheet (Etron Technology) - 8M x 32 bit Synchronous DRAM

EM63A325, 8M x 32 bit Synchronous DRAM

Table 3.

Pin Details Symbol Type Description CLK Input Clock: CLK is driven by the system clock.

All SDRAM input signals are sampled on the positive edge of CLK.

CLK also increments the internal burst counter and controls the output registers.

CKE Input Cl

EM63A325 Features

* Fast access time from clock: 4.5/5/5.4 ns

* Fast clock rate: 200/166/143MHz

* Fully synchronous operation

* Internal pipelined architecture

* 2M word x 32-bit x 4-bank

* Programmable Mode registers - CAS Latency: 2, or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type