DDU4C-5500 - 5-TAP/ HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C)

Product Overview

Part number	DDU4C-5500
Manufacturer	ETC
File Size	65.50 KB
Description	5-TAP/ HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C)
Datasheet	DDU4C-5500 Datasheet
Additional preview pages of the DDU4C-5500 datasheet.

The DDU4C-series device is a 5-tap digitally buffered delay line.

Five equally spaced outputs Fits standard 8-pin DIP socket Low profile Auto-insertable Input & outputs fully CMOS interfaced & buffered 2 10 T L fan-out capability IN 1 14 12 T2 T4 GND 4 10 6 7 8 data 3 ® delay devices, inc.

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Published: Mar 27, 2005 |