M12L128168A-5TVG2S - 2M x 16 Bit x 4 Banks Synchronous DRAM

ESMT

Datasheet Details

Part number	M12L128168A-5TVG2S
Manufacturer	ESMT
File Size	1.02 MB
Description	2M x 16 Bit x 4 Banks Synchronous DRAM
Datasheet	M12L128168A-5TVG2S-ESMT.pdf

The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits.

JEDEC standard 3.3V power supply.
LVTTL compatible with multiplexed address.
Four banks operation.
MRS cycle with address key programs - CAS Latency ( 2 & 3 ) - Burst Length ( 1, 2, 4, 8 & full page ) - Burst Type ( Sequential & Interleave ).
All inputs are sampled at the positive going edge of the system clock.
Burst Read single write operation.
DQM for masking.
Auto & self refresh (self refresh is not supported for VA grade).
Refresh - 64 ms refres.

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Published: Mar 25, 2019 |