CY7C1357C, CY7C1355C Datasheet - Cypress Semiconductor

CY7C1357C (CY7C1355C / CY7C1357C) 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM

1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/ 512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bus Latency (NoBL) logic re.

CY7C1357C Features

* No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles.

* Can support up to 133-MHz bus operations with zero wait states

* Data is transferred on every clock

* Pin compatible and functionally equivalent to ZBT™ devices

* In

CY7C1355C_CypressSemiconductor.pdf

CY7C1357C Datasheet Preview — This datasheet PDF includes multiple part numbers: CY7C1357C, CY7C1355C. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

CY7C1357C, CY7C1355C

Manufacturer:

Cypress Semiconductor

File Size:

708.89 KB

Description:

(cy7c1355c / cy7c1357c) 9-mbit (256k x 36/512k x 18) flow-through sram.

Note:

This datasheet PDF includes multiple part numbers: CY7C1357C, CY7C1355C.
Please refer to the document for exact specifications by model.

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TAGS

CY7C1357C CY7C1355C CY7C1355C CY7C1357C 9-Mbit 256K 512K Flow-Through SRAM Cypress Semiconductor

CY7C1357C Distributor