ADSP-TS202S Datasheet (Analog Devices) - TigerSHARC Embedded Processor

ADSP-TS202S, TigerSHARC Embedded Processor

3 Dual Compute Blocks 4 Data Alignment Buffer (DAB) 4 Dual Integer ALU (IALU) 4 Program Sequencer 5 Interrupt Controller 5 Flexible Instruction Set 5 DSP Memory 5 External Port (Off-Chip Memory/Peripherals Interface) .

5 Host Interface 6 Multiprocessor Interface 7 SDRAM Controller 7 EPROM

ADSP-TS202S Features

* 500 MHz, 2.0 ns Instruction Cycle Rate 12M Bits of Internal

* On-Chip

* DRAM Memory 25×25 mm (576-Ball) Thermally Enhanced Ball Grid Array Package Dual Computation Blocks

* Each Containing an ALU, a Multiplier, a Shifter, and a Register File Dual Integer ALUs, providing Data Addres