ADSP-TS101S - TigerSHARC Embedded Processor

Product Overview

Analog Devices

Part number	ADSP-TS101S
Manufacturer	Analog Devices
File Size	472.17 KB
Description	TigerSHARC Embedded Processor
Datasheet	ADSP-TS101S Datasheet
Additional preview pages of the ADSP-TS101S datasheet.

GENERAL DESCRIPTION 2 Dual Compute Blocks . . . . . .

300 MHz, 3.3 ns Instruction Cycle Rate 6M Bits of Internal.
On-Chip.
SRAM Memory 19 mm ؋ 19 mm (484-Ball) or 27 mm ؋ 27 mm (625-Ball) PBGA Package Dual Computation Blocks.
Each Containing an ALU, a Multiplier, a Shifter, and a Register File Dual Integer ALUs, Providing Data Addressing and Pointer Manipulation Integrated I/O Includes 14 Channel DMA Controller, External Port, Four Link Ports, SDRAM Controller, Programmable Flag Pins, Two Timers, and Timer Expired Pin for Syste.

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Published: Nov 20, 2006 |