ASM5I9352

The ASM5I9352 is 11-Output Zero Delay Buffer designed by Alliance Semiconductor.

Product Overview

Alliance Semiconductor

Datasheet Details

Part number	ASM5I9352
Manufacturer	Alliance Semiconductor
File Size	513.00 KB
Description	11-Output Zero Delay Buffer
Datasheet	ASM5I9352_AllianceSemiconductor.pdf
Additional preview pages of the ASM5I9352 datasheet.

Product details

Description

The ASM5I9352 is a low voltage high performance 200MHz PLL-based zero delay buffer designed for high speed clock distribution applications. Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com Notice: The infor

Features

Output frequency range: 25MHz to 200MHz Output frequency range: 16.67MHz to 200MHz Input frequency range: 16.67MHz to 200MHz ASM5I9352 The ASM5I9352 features an LVCMOS reference clock input and provides 11 outputs partitioned in 3 banks of 5, 4, and 2 outputs. Bank A divides the VCO output by 4 or 6 while Bank B divides by 4 and 2 and Bank C divides by 2 and 4 per SEL(A:C) settings, see Table 2. These dividers allow output to input ratios of 3:1, 2:1, 3:2, 1:1, 2:3, 1:2, and.

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Other Datasheets by Alliance Semiconductor

ASM5I9350 - 3.3V 1:10 LVCMOS PLL Clock Generator
ASM5I9351 - 9-Output Zero Delay Buffer
ASM5I961C - Low Voltage Zero Delay Buffer
ASM5I961P - Low Voltage Zero Delay Buffer
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Published: May 9, 2008 |